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JEDEC Releases Update to DDR5 SDRAM Standard Used in High Performance Computing Applications

By on October 26, 2021 0

ARLINGTON, Virginia – (COMMERCIAL THREAD) – JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the release of the JESD79-5A DDR5 SDRAM standard. This update to the JEDEC DDR5 SDRAM standard includes features designed to improve reliability and performance in a wide range of applications involving high performance client systems and servers. JESD79-5A is now available for download from the JEDEC website.

Added features designed to meet industry demand for improved system reliability include support for limited fault error correction, Soft Post-Package Repair (sPPR) override and lockout, Built-in self-test package repair memory (MBIST and mPPR), Adaptive RFM, and an MR4 extension.

JESD79-5A extends the sync definition and transfer speed of DDR5 up to 6400 MT / s for DRAM base timings and 5600 MT / s for AC IO timings to enable industry to create an ecosystem up to 5,600 MT / s. The nomenclature of the main synchronization parameters and their respective definitions have been revised to closely align with the upcoming JEDEC JESD400-5 DDR5 Serial Presence Detect (SPD) Contents V1.0 standard.

“The fact that this DDR5 update is released so soon after the initial launch of DDR5 in July 2020 underscores JEDEC’s continued commitment to continuous improvement and represents a collective effort on the part of all stakeholders. member companies involved to better serve the industry ”said Mian Quddus, President of JEDEC.

Industry support

AMD is proud of our continued collaboration with JEDEC, advancing the high performance computing industry with powerful enhancements to DDR5 functionality, ”said Joe Macri, CTO, Computing and Graphics Business Unit, AMD. “With the new JESD79-5A DDR5 standard, JEDEC offers the most advanced memory for high performance and reliability and continues our shared commitment to deliver the best possible experiences to end users. ”

Intelligence is committed to cutting-edge technological innovations that will greatly benefit the industry and our customers. DDR5 represents the next advancement in consumer memory technology that will be present in future client and server platforms. Working with our ecosystem partners and standards associations like JEDEC helps end customers accelerate the adoption of new technologies and achieve breakthrough IT performance. said Carolyn Duran, VP – Data Platforms Group, GM – Memory and IO Technologies at Intel.

“Close collaboration is required to provide the system-level reliability and scalability performance that data-centric workloads demand from DDR5,” said Frank Ross, chief architect at Micron. “Micron is proud to work with JEDEC and a broad ecosystem to advance memory standards that allow customers to turn data into information faster. ”

“This new update to DDR5 shows how the industry is committed to working together to create faster, more reliable memory solutions for enterprise and customer markets in a timely manner,” said Christopher Cox, president of the JC-42 memory committee and vice president of strategy. Technologies at Mounting technology. “5G, machine learning and AI are driving the speeds and flows of the IT industry at an astounding rate and the entire global JEDEC organization has come together to continue improving the DDR5 standard to to meet those needs. ”

Samsung is proud to see that DDR5 memory will be able to reach new heights in operating efficiency and self-correcting capabilities, which we and other industry leaders have worked hard to standardize at over the past 14 months, ”said Young-Soo Sohn, vice president president of DRAM Memory Planning / Enabling Group at Samsung Electronics. “With these enhancements, the industry is laying an extremely solid foundation for one of the most ambitious memory upgrades ever, a breakthrough that is particularly important for large server systems,” he added.

“While new reliability features are now part of the DDR5 standard, SK hynix is pleased to be able to provide a more robust memory solution to our customers. Additionally, being able to deliver higher device speeds will take the overall system performance to higher levels. SK hynix has been providing DDR5 DIMM samples to industry since 2019 for ecosystem readiness, and will continue to actively participate in future JEDEC activities for continuous open innovation and ecosystem activation, ”said Uksong Kang , DRAM Product and Planning Manager at SK hynix.

About JEDEC

JEDEC is the world leader in the development of standards for the microelectronics industry. Thousands of volunteers representing over 300 member companies work together in over 100 JEDEC committees and working groups to meet the needs of each segment of the industry, manufacturers and consumers. The publications and standards generated by JEDEC committees are accepted worldwide. All JEDEC standards are available for download from the JEDEC website. For more information, visit https://www.jedec.org/.


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